uboot下的i2c命令解读与示例

Author: Bruce Liu Posted on: 2020-12-26 17:35:28 Visited: 2319

 

在uboot下输入i2c命令后,会返回以下信息。

其中的i2c dev/i2c probe/i2c speed较容易理解和使用。

但i2c md等命令说明不是常规的写法,解读起来有些困难。

uboot>i2c                                                                  
i2c - I2C sub-system                                                            
                                                                                
Usage:                                                                          
i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum               
i2c dev [dev] - show or set current I2C bus                                     
i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device       
i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device           
i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)       
i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)      
i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)        
i2c probe [address] - test for and show device(s) on the I2C bus                
i2c read chip address[.0, .1, .2] length memaddress - read to memory            
i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c      
i2c reset - re-init the I2C Controller                                          
i2c speed [speed] - show or set I2C bus speed  

 

在uboot的源代码cmd/i2c.c中有详细解释说明

i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device

以执行命令i2c md 0x50 0.2 0x40为例子,从slave地址0x50(7位地址),从i2c设备的0x0开始(2个字节),读取0x40个字节

1:  0x50对应chip,是i2c的slave地址。

2:  0.2 对应address[.0, .1, .2],指两个字节的地址位,对应地址0x0000

3: 0x40为读取的数目,为16进制。

以执行命令i2c md 0x50 0x0f80.2 0x40为例子,从slave地址0x50(7位地址),从i2c设备的0x0f80开始(2个字节),读取0x40个字节

 


/*
 * I2C Functions similar to the standard memory functions.
 *
 * There are several parameters in many of the commands that bear further
 * explanations:
 *
 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
 *   Each I2C chip on the bus has a unique address.  On the I2C data bus,
 *   the address is the upper seven bits and the LSB is the "read/write"
 *   bit.  Note that the {i2c_chip} address specified on the command
 *   line is not shifted up: e.g. a typical EEPROM memory chip may have
 *   an I2C address of 0x50, but the data put on the bus will be 0xA0
 *   for write and 0xA1 for read.  This "non shifted" address notation
 *   matches at least half of the data sheets :-/.
 *
 * {addr} is the address (or offset) within the chip.  Small memory
 *   chips have 8 bit addresses.  Large memory chips have 16 bit
 *   addresses.  Other memory chips have 9, 10, or 11 bit addresses.
 *   Many non-memory chips have multiple registers and {addr} is used
 *   as the register index.  Some non-memory chips have only one register
 *   and therefore don't need any {addr} parameter.
 *
 *   The default {addr} parameter is one byte (.1) which works well for
 *   memories and registers with 8 bits of address space.
 *
 *   You can specify the length of the {addr} field with the optional .0,
 *   .1, or .2 modifier (similar to the .b, .w, .l modifier).  If you are
 *   manipulating a single register device which doesn't use an address
 *   field, use "0.0" for the address and the ".0" length field will
 *   suppress the address in the I2C data stream.  This also works for
 *   successive reads using the I2C auto-incrementing memory pointer.
 *
 *   If you are manipulating a large memory with 2-byte addresses, use
 *   the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
 *
 *   Then there are the unfortunate memory chips that spill the most
 *   significant 1, 2, or 3 bits of address into the chip address byte.
 *   This effectively makes one chip (logically) look like 2, 4, or
 *   8 chips.  This is handled (awkwardly) by #defining
 *   CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
 *   {addr} field (since .1 is the default, it doesn't actually have to
 *   be specified).  Examples: given a memory chip at I2C chip address
 *   0x50, the following would happen...
 *     i2c md 50 0 10   display 16 bytes starting at 0x000
 *                      On the bus:  A0 00   A1  ... 
 *     i2c md 50 100 10 display 16 bytes starting at 0x100
 *                      On the bus:  A2 00   A3  ... 
 *     i2c md 50 210 10 display 16 bytes starting at 0x210
 *                      On the bus:  A4 10   A5  ... 
 *   This is awfully ugly.  It would be nice if someone would think up
 *   a better way of handling this.
 *
 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
 */

参考执行示例
 

uboot>i2c dev                                                              
Current bus is 9                                                                
uboot>i2c dev 6                                                            
Setting bus to 6                                                                
uboot>i2c dev                                                              
Current bus is 6                                                                
uboot>i2c dev 9                                                            
Setting bus to 9                                                                
                                             
uboot>i2c md 0x50 0.2 0x40                                                 
0000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................       
0010: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................       
0020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................       
0030: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................       
uboot>                                                                     
uboot>i2c probe 0x50                                                       
Valid chip addresses: 50                                                        
uboot>i2c probe 0xa0                                                       
Valid chip addresses:                                                           
uboot>i2c speed                                                            
Current bus speed=100000 

 




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